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Embedded-Systems-Bare-Metal-Programming-Ground-Up
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Grade
Name
Complexity
Churn
Issues
A
UART_TX\CMSIS_5\CMSIS\Core\Include\core_cm3.h
50 1 2
A
gpio input\CMSIS_5\CMSIS\Core\Include\core_cm7.h
53 1 2
A
Bilnky Segger\STM32F4xx\CMSIS\Device\Source\system_stm32f4xx.c
19 1 2
A
GP Timer\CMSIS_5\CMSIS\Core\Include\core_armv8mbl.h
87 1 2
A
gpio input\CMSIS_5\CMSIS\Core\Include\core_cm3.h
50 1 2
A
gpio input\CMSIS_5\CMSIS\Core\Include\core_cm23.h
87 1 2
A
gpio input\CMSIS_5\CMSIS\Core\Include\core_armv8mbl.h
87 1 2
A
GP Timer\CMSIS_5\CMSIS\Core\Include\core_cm3.h
50 1 2
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\core_cm7.h
53 1 2
A
GP Timer\CMSIS_5\CMSIS\Core\Include\core_cm23.h
87 1 2
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\core_cm4.h
52 1 2
A
UART_TX_RX\main_old.c
14 3 2
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\core_sc300.h
50 1 2
A
ADC\STM32F4xx\CMSIS\Device\Source\system_stm32f4xx.c
19 1 2
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\core_cm3.h
50 1 2
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\core_cm23.h
87 1 2
A
UART_TX_RX\CMSIS_5\CMSIS\Core\Include\core_sc300.h
50 1 2
A
systick delay\CMSIS_5\CMSIS\Core\Include\core_cm4.h
52 1 2
A
Bilnky Segger\CMSIS_5\CMSIS\Core\Include\core_armv8mbl.h
87 1 2
B
UART_TX_RX\main.c
16 8 2