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testing-tvm-vta
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Name
Complexity
Churn
Issues
A
apps\tsim_example\tests\python\chisel_accel.py
1 4 -
A
hardware\chisel\src\test\scala\unittest\MvmTest.scala
3 5 -
A
apps\tsim_example\tests\python\verilog_accel.py
1 4 -
A
hardware\chisel\src\main\scala\util\Config.scala
27 4 -
A
apps\verilator\add\src\driver.cc
15 1 -
A
hardware\chisel\src\main\scala\util\SyncQueue.scala
 2 -
A
apps\verilator\add\src\kernel.cc
12 1 -
A
apps\deploy\resnet_export.py
15 2 -
A
hardware\chisel\src\main\scala\dpi\VTAHostDPI.scala
 7 -
A
hardware\chisel\src\main\scala\vta\Configs.scala
 5 -
A
hardware\chisel\src\main\scala\dpi\VTASimDPI.scala
 6 -
A
apps\gemm\src\driver.cc
19 4 -
A
hardware\chisel\src\main\scala\shell\Configs.scala
 4 -
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hardware\chisel\src\main\scala\core\Configs.scala
 5 -
A
hardware\chisel\src\test\scala\unittest\SyncQueueTest.scala
14 2 -
A
hardware\chisel\src\test\scala\unittest\SyncQueue2PortMemTest.scala
14 2 -
A
hardware\chisel\src\test\scala\unittest\AluTest.scala
14 7 -
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hardware\chisel\src\main\scala\shell\XilinxShell.scala
 5 -
A
apps\deploy\run_python_deploy.sh
 1 -
A
apps\gemm\tests\python\chisel_accel.py
31 5 -